1. Field of the Invention
The present invention relates to a semiconductor storage device and a method of manufacturing the same.
2. Description of the Related Art
Recently, semiconductor storage devices such as NAND-type flash memory are implemented on many electronics. As demands for increasing functionality of such electronics grow, the semiconductor storage devices are required to have more storage capacity and more shrinking of storage elements.
Taking NAND-type flash memory as an example, it commonly uses memory transistors with a MOSFET structure having laminated floating and control gates. The NAND-type flash memory includes a NAND cell unit having a plurality of such memory transistors connected in series. Each NAND cell unit has one end connected to a bit line via a selection gate transistor, and the other end connected to a source line via a selection gate transistor.
For the memory and the selection gate transistors with such MOSFET structures, impurities are implanted into the channel parts in order to adjust cut-off characteristics (see, for example, Japanese Patent Laid-Open No. 2008-166747). For the memory transistors of n-type MOSFETs, p-type impurities such as boron (B) are implanted into the channel parts.
So shrinking of devices advances, however, a problem arises that may cause difficulty in ion implantation due to the smaller channel width of selection gate transistors. In addition, variation of the amount of implanted ions in each memory cells is larger.